A phase-interpolation direct digital synthesizer with an adaptive integrator

Citation
A. Yamagishi et al., A phase-interpolation direct digital synthesizer with an adaptive integrator, IEEE MICR T, 48(6), 2000, pp. 905-909
Citations number
4
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES
ISSN journal
00189480 → ACNP
Volume
48
Issue
6
Year of publication
2000
Pages
905 - 909
Database
ISI
SICI code
0018-9480(200006)48:6<905:APDDSW>2.0.ZU;2-Y
Abstract
A phase-interpolation direct digital synthesizer (DDS) with an adaptive int egrator is described in this paper. Unlike a conventional DDS, it does not use ROM or a D/A converter. Therefore, less power is dissipated and the max imum speed is increased. The delay time for phase interpolation is generate d by the adaptive integrator, which is composed of a capacitance switch arr ay and current switch array, and by a comparator with constant threshold vo ltage. The DDS was fabricated on 0.5-mu m CMOS process technology. The spur ious level is lower than -50 dBc and the power dissipation is 60 mW at a cl ock frequency of 40 MHz and output frequency of about 19 MHz.