J. Chou et K. Ramchandran, Arithmetic coding-based continuous error detection for efficient ARQ-basedimage transmission, IEEE J SEL, 18(6), 2000, pp. 861-867
Block cyclic redundancy check (CRC) codes are typically used to perform err
or detection in Automatic Repeat Request (ARQ) protocols for data communica
tions. Although efficient, CRC's can detect errors only after an entire blo
ck of data has been received and processed. In this paper, we propose a new
"continuous" error detection scheme using arithmetic coding that provides
a novel tradeoff between the amount of added redundancy and the amount of t
ime needed to detect an error once it occurs. This method of error detectio
n, first introduced by Bell, Witten, and Cleary, is achieved through the us
e of an arithmetic codec, and has the attractive feature that it can be com
bined physically with arithmetic source coding, which is widely used in sta
te-of-the-art image coders. We analytically optimize the tradeoff between a
dded redundancy and error-detection time, achieving significant gains in bi
t rate throughput over conventional ARQ schemes for Binary Symmetric Channe
l models for all probabilities of error.