EXCELLENCE OF GATE OXIDE INTEGRITY IN METAL-OXIDE-SEMICONDUCTOR LARGE-SCALE-INTEGRATED CIRCUITS BASED ON P- P- THIN-FILM EPITAXIAL SILICON-WAFERS/

The substitution of Czochralski (CZ)-silicon (Si) wafers into p(-)(n(- ))/p(-)(n(-)) (p(-) or n(-) layer on p(-) or n(-) Si substrate: resist ivity of approximately 100 m Omega m) thin-film epitaxial Si wafers us ed as starting materials has been investigated with respect to applica tion to metal-oxide-semiconductor (MOS) large-scale-integrated circuit s (LSIs). The optimum epitaxial layer (p(-)/p(-) structure) thickness for MOS-LSIs was determined to be approximately 1 mu m from the viewpo ints of gate oxide integrity (GOI) improvement and cost effectiveness. With increasing epitaxial layer thickness from 0.1 to 0.3 mu m, the o xide defect density was greatly reduced and leveled off at approximate ly 1/30 that of a CZ-Si layer if the layer thickness is above 0.3 mu m . This is because microdefects in CZ-Si represented by crystal origina ted particles (COP) which cause weak spots in the gate oxide layer are covered by an excellent Si epitaxial layer on the OZ-Si surface. The p(-)/p(-) thin epitaxial structure results in very controlled resistiv ity for electrically active regions in the device, resulting in a lowe r cost of growth.