THE IMPACTS OF BACK-END HIGH-TEMPERATURE THERMAL TREATMENTS ON THE CHARACTERISTICS AND GATE OXIDE RELIABILITY OF THIN-FILM-TRANSISTOR IN ULTRA LARGE-SCALE INTEGRATED-CIRCUIT PROCESS

Citation
Ky. Lee et al., THE IMPACTS OF BACK-END HIGH-TEMPERATURE THERMAL TREATMENTS ON THE CHARACTERISTICS AND GATE OXIDE RELIABILITY OF THIN-FILM-TRANSISTOR IN ULTRA LARGE-SCALE INTEGRATED-CIRCUIT PROCESS, JPN J A P 1, 36(5A), 1997, pp. 2628-2632
Citations number
11
Categorie Soggetti
Physics, Applied
Volume
36
Issue
5A
Year of publication
1997
Pages
2628 - 2632
Database
ISI
SICI code
Abstract
The impacts or the two major high temperature treatments on the charac teristics of thin film transistors (TFT's) in the back-end process of ultra large scale integrated circuit (ULSI) technology hare been inves tigated. TFT's without any high temperature treatment show poor charac teristics, High temperature furnace annealing and rapid thermal anneal ing (RTA) which are performed for boron phosphorous tetra ethyl ortho silicate (BPTEOS) planarization can improve the characteristics of low temperature recrystallized TFT. Then, the technologies used for conta ct annealing result significant difference on the characteristics of T FT's. High temperature furnace contact annealing can still greatly imp rove the characteristics of TFT's, However, after furnace annealing fo r BPTEOS planarization, RTA contact annealing deteriorates the charact eristics of TFT. High temperature furnace annealing for BPTEOS planari zation improves the charge to breakdown (Q(bd)) value of the gate oxid e of TFT and so does the furnace contact annealing. However, RTA conta ct annealing performed after the furnace planarization flow deteriorat es that of the gate oxide.