Capacitance-voltage study of single-crystalline Si dots on ultrathin buried SiO2 formed by nanometer-scale local oxidation

By applying nanometer-scale local oxidation process to a silicon-on-insulat or (SOI) wafer with an ultrathin (2 nm) buried oxide, single-crystalline Si dots were fabricated on the tunnel SiO2, and their electronic properties w ere studied by capacitance-voltage (C-V) measurements. The C-V curves were primarily interpreted by electron tunneling between the dots and the base s ubstrate. More importantly, the gap states at the dot/SiO2 interface were a lways observed as a shoulder in the C-V curve. Since such a shoulder was no t observed for a simple layered SOI structure, it is strongly suggested tha t the dot structure inevitably accompanies a large number of the interface gap states, probably due to the undulation of the interface. (C) 2000 Elsev ier Science S.A. All rights reserved.