3-D floorplanning: Simulated annealing and greedy placement methods for reconfigurable computing systems

The advances in the programmable hardware has lead to new architectures whe re the hardware can be dynamically adapted to the application to gain bette r performance. There are still many challenging problems to be solved befor e any practical general-purpose reconfigurable system is built. One fundame ntal problem is the placement of the modules on the reconfigurable function al unit (RFU). In reconfigurable systems, we are interested both in online placement, where arrival time of tasks is determined at runtime and is not known a priori, and offline in which the schedule is known at compile time. In the case of offline placement, we are willing to spend more time during compile time to find a compact floorplan for the RFU modules and utilize t he RFU area more efficiently. In this paper we present offline placement al gorithms based on simulated annealing and greedy methods and show the super iority of their placements over the ones generated by an online algorithm.