Analysis and experimental verification of digital substrate noise generation for epi-type substrates

Citation
M. Van Heijningen et al., Analysis and experimental verification of digital substrate noise generation for epi-type substrates, IEEE J SOLI, 35(7), 2000, pp. 1002-1008
Citations number
16
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE JOURNAL OF SOLID-STATE CIRCUITS
ISSN journal
00189200 → ACNP
Volume
35
Issue
7
Year of publication
2000
Pages
1002 - 1008
Database
ISI
SICI code
0018-9200(200007)35:7<1002:AAEVOD>2.0.ZU;2-T
Abstract
Substrate coupling in mixed-signal IC's can cause important performance deg radation of the analog circuits. Accurate simulation is therefore needed to investigate the generation, propagation, and impact of substrate noise. Re cent studies were limited to the time-domain behavior of generated substrat e noise and to noise injection from a single noise source. This paper focus es on substrate noise generation by digital circuits and on the spectral co ntent of this noise. To simulate the noise generation, a SPICE substrate mo del for heavily doped epi-type substrates has been used. The accuracy of th is model has been verified with measurements of substrate noise, using a wi de-band, continuous-time substrate noise sensor, which allows accurate meas urement of the spectral content of substrate noise. The substrate noise gen eration of digital circuits is analyzed, both in the time and frequency dom ain, and the influence of the different substrate noise coupling mechanisms is demonstrated. It is shown that substrate noise voltages up to 20 mV are generated and that, in the frequency band up to 1 GHz, noise peaks are gen erated at multiples of the clock and repetition frequency. These noise sign als will strongly deteriorate the behavior of small signal analog amplifier s, as used in integrated front-ends.