A 256 x 256 pixel smart CMOS image sensor for line-based stereo vision applications

This paper presents a 256 x 256 pixel smart CMOS image sensor for line-base d vision applications, By combining the edge-based analog processing techni que with an active pixel array, a dense and fast on-chip analog image proce ssing has been achieved. The on-chip processing unit includes 1) an analog histogram equalizer, 2) a programmable recursive Gaussian filter, 3) a spat io-temporal differentiator, and 4) a local extrema extractor An electronic shutter is applied to the active pixel sensor array in order to adapt the e xposure time in a function of global illumination. The on-chip histogram eq ualizer extends the image into a constant and optimal range for all the fol lowing processing operators and gives a stable and predictable precision of the analog processing. A prototype chip has been designed and fabricated i n a standard 0.8-mu m CMOS process with double poly and double metal, givin g a pixel pitch of 20 mu m and die size of 7 x 7 mm(2), A line processing t ime is compatible with TV line scan period, The worst case power consumptio n measures 40 mA at 5 V.