In this paper, we present a single-path multi-bit delta-sigma analog-to-dig
ital converter (Delta Sigma ADC) architecture that uses time as a reference
for performing multi-bit digital-to-analog conversion in the feedback path
. The architecture uses a voltage-controlled oscillator as a multi-bit quan
tizer. In the feedback path of the Delta Sigma ADC, the errors due to compo
nent mismatch are avoided by using a single-path for all the levels in a mu
lti-bit digital-to-analog converter (DAC), The technique eliminates the nee
d for feedback DAC architectures with static and dynamic component matching
.