Low power BIST by filtering non-detecting vectors

Citation
S. Manich et al., Low power BIST by filtering non-detecting vectors, J ELEC TEST, 16(3), 2000, pp. 193-202
Citations number
13
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS
ISSN journal
09238174 → ACNP
Volume
16
Issue
3
Year of publication
2000
Pages
193 - 202
Database
ISI
SICI code
0923-8174(200006)16:3<193:LPBBFN>2.0.ZU;2-N
Abstract
In this paper, two techniques to reduce the energy and the average power co nsumption of the system are proposed. They are based on the fact that as th e test progresses, the detection efficiency of the pseudo-random vectors de creases very quickly. Many of the pseudo-random vectors will not detect fau lts in spite of consuming a significant amount of energy from the power sup ply. In order to prevent this energy consumption, a filtering of the non-de tecting vectors and a reseeding strategy are proposed. These techniques are evaluated on the set of ISCAS-85 benchmark circuits. E xtensive simulations have been made using the SAIL energy simulator showing that, in large circuits, the energy consumption and the average power savi ngs reach 90.0% with a mean value of 74.2% with the filtering technique, an d 97.2% with an average value of 90.9% with the reseeding strategy.