Electrical characterization of ultra-thin gate oxides on Si/Si1-x-yGexCy/Si quantum well heterostructures

Citation
S. Maikap et al., Electrical characterization of ultra-thin gate oxides on Si/Si1-x-yGexCy/Si quantum well heterostructures, SEMIC SCI T, 15(7), 2000, pp. 761-765
Citations number
27
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Journal title
SEMICONDUCTOR SCIENCE AND TECHNOLOGY
ISSN journal
02681242 → ACNP
Volume
15
Issue
7
Year of publication
2000
Pages
761 - 765
Database
ISI
SICI code
0268-1242(200007)15:7<761:ECOUGO>2.0.ZU;2-R
Abstract
Ultra-thin gate oxides (<100 Angstrom) have been grown on partially strain- compensated Si/Si1-x-yGexCy/Si heterolayers (with different carbon concentr ations) using microwave O-2-plasma. A MOS capacitor has been used for the c haracterization of grown oxides. Capacitance-voltage (C-V) profiling has be en used to measure the apparent doping profile and thickness of the unconsu med Si-cap layer. A significant improvement in charge trapping properties, under Fowler-Nordheim (F-N) constant current stressing, has been observed f or low carbon containing films. The valence band offsets (Delta E-nu) of Si /Si0.69Ge0.3C0.01 and Si/Si0.685Ge0.3C0.015 heterostructures have been extr acted using the hole confinement characteristics. Incorporation of C lowers the valence band offset of the ternary alloy compared to those in Si1-xGex with the same Ge mole fraction.