Analysis of shared buffer switches under non-uniform traffic pattern and global flow control

Shared buffer switches do not suffer from head of line blocking which is a common problem in simple input buffering. Shared buffer switches have previ ously been studied under uniform and unbalanced traffic patterns. However, due to the complexity of the model, it was not possible to fully explore th e performance of such a switch, in the presence of a single hot spot. In th is paper, we develop a new model for an ATM switch constructed from shared buffered switching elements, and operating under a hot spot traffic pattern . Hot spot traffic is one of more realistic traffic in ATM switching. The m odel is validated by comparison with simulation results. The model is used to study the switch performance in terms of throughput, cell delay, cell lo ss probability and the optimal buffer utilization. Numerical results show t hat, in the presence of hot spot traffic, shared buffer switches degrade mo re significantly than switches with dedicated input and/or output buffers. The model can be used by switch designers to optimize the design and perfor mance of switches. (C) 2000 Elsevier Science B.V. All rights reserved.