Process technologies for SOCs

This paper introduces a family of process technologies for fabriating high- performance SOCs. These technologies can be used to embed digital and analo g elements and memory such as SRAMs, ROMs, DRAMs, and flash EPROMs. Current ly, any macro cell, except a flash EPROM, can be integrated on a silicon ch ip using the developed 0.25 mu m and 0.18 mu m process technologies. Althou gh it is currently very difficult to assure full compatibility between flas h EPROMs and other macro cells, these technologies enable a flash EPROM to be embedded in certain 0.35 mu m MCUs.