Performance of a large multicast ATM switch

In this paper, we present the design of a large self-routing multicast ATM switch. The switch consists of a sorting network followed by a 3-stage rout ing network. We first present a simple design of a large sorting network bu ilt using small sized shared memory that can be used as a building block fo r a large sorting network. Small sized shared memory is also used in the 3- stage routing network making the switch modular and easy to implement using current VLSI technology. As the network uses shared memory modules, multic asting functionality is easily built into the network. The performance of t he proposed network is compared with an equivalent completely shared memory switch using computer simulations under bursty traffic model. The results show that the proposed network has better performance in terms of cell loss ratio than the completely shared memory switch under moderate to heavy tra ffic load (0.6 less than or equal to effective offered load less than or eq ual to 1.2). Furthermore, multicast cell delays are drastically improved.