Effective parameterization of architectural registers for register allocation algorithms

Code Selection in translation has been effectively abstracted out in terms of tree rewriting or pattern matching based approaches. However, modelling register files in an architecture independent way is a problem which is byp assed in most available algorithms. Architectural parameterization is frequ ently just code selector generation while architectural registers and opera nd constraints are handled in a machine-specific way. To partially address this issue, we present an abstraction for register allocation and assignmen t in non-uniform register file architectures in terms of bipartite graph ma tching.