A new class of convex functions for delay modeling and its application to the transistor sizing problem

This paper derives a methodology for developing accurate convex delay model s to be used for transistor sizing. A new rich class of convex functions to model gate delay is presented and the circuit delay under such a model is shown to be equivalent to a convex function, The richness of these function s is exploited to accurately model gate delay for modern designs. Since the delay under this model is a convex function, optimal sizing algorithms bas ed on convex programming techniques are applied with the new delay model. E xperimental results demonstrating the accuracy of proposed model are presen ted along with results of sizing various test circuits.