DFT for digital detection of analog parametric faults in SC filters

Parametric faults are a significant cause of incorrect operation in analog circuits. Many design for test techniques for analog circuits are ineffecti ve at detecting multiple parametric faults because either their accuracy is poor, or the circuit is not tested in the configuration in which it is use d. We present a design for test (DFT) scheme that offers the accuracy neede d to test high-quality circuits. The DFT scheme is based on a circuit that digitally measures the ratio of a pair of capacitors. The circuit is used t o characterize the transfer function of a switched capacitor circuit, which is usually determined by capacitor ratios. In our DFT scheme, capacitor ra tios can be measured to within 0.01% accuracy and filter parameters can be shown to be satisfied to within 0.1% accuracy. With this characterization p rocess, a filter can be directly shown to satisfy all specifications that d epend on capacitor ratios. We believe the accuracy of our approach is at le ast an order of magnitude greater than that offered by any other DFT scheme reported in the literature.