Effects of denudation anneal of silicon wafer on the characteristics of ultra large-scale integration devices

Authors
Citation
Wj. Cho et H. Kuwano, Effects of denudation anneal of silicon wafer on the characteristics of ultra large-scale integration devices, JPN J A P 1, 39(6A), 2000, pp. 3277-3280
Citations number
19
Categorie Soggetti
Apllied Physucs/Condensed Matter/Materiales Science
Volume
39
Issue
6A
Year of publication
2000
Pages
3277 - 3280
Database
ISI
SICI code
Abstract
The effectiveness of denudation annealing at high temperatures on the chara cteristics of ultra large-scale integration (ULSI) devices has been studied . The secondary-ion mass spectroscopy (SIMS) profile showed that the oxygen atoms near the wafer surface diffuse out during the denudation anneal and the amount of outdiffused oxygen atoms increases with the increase of denud ation annealing temperature. The depth of the defect-free zone (DFZ) at the surface region, the breakdown property of the thin gate oxide of 7 nm thic kness and the leakage current of PN junction diodes were greatly improved f ollowing by the denudation annealing process at a high temperature. It is f ound that the refresh properties of a 256 Mbit dynamic random-access memory (256 M-DRAMs) were closely related to the depth of the DFZ at the device s urface and were improved by the denudation annealing. Therefore, denudation annealing at high temperatures is effective for the fabrication of reliabl e quarter-micron level DRAM devices.