IMPACT OF HIGH-TEMPERATURE RAPID THERMAL ANNEALING IN DEEP-SUBMICROMETER CMOSFET DESIGN

Citation
A. Shimizu et al., IMPACT OF HIGH-TEMPERATURE RAPID THERMAL ANNEALING IN DEEP-SUBMICROMETER CMOSFET DESIGN, Electronics & communications in Japan. Part 2, Electronics, 79(12), 1996, pp. 54-63
Citations number
17
Categorie Soggetti
Engineering, Eletrical & Electronic
ISSN journal
8756663X
Volume
79
Issue
12
Year of publication
1996
Pages
54 - 63
Database
ISI
SICI code
8756-663X(1996)79:12<54:IOHRTA>2.0.ZU;2-V
Abstract
We investigated the impact of high-temperature rapid thermal annealing (HT-RTA) for CMOSFET design in the deep-submicrometer regime. HT-RTA (>1000 degrees C) carried out immediately after ion implantation can r educe the transient enhanced diffusion of implanted impurities and sup press interactions between these impurities, both of which are usually observed in low-temperature furnace annealing processes. HT-RTA is de finitely effective in CMOSFET design optimization, since it can contro l impurity profiles more precisely than conventional thermal processes , leading to improvements in the short-channel effects, current drivab ility, and reliability of MOSFETs. We also show that HT-RTA serves as a methodology for analyzing the RSCE (reverse short-channel effects) a nd ESCE (enhanced short-channel effects) taking place simultaneously i n deep-submicrometer MOSFETs. (C) 1997 Scripta Technica, Inc.