Modern microelectronic device manufacture requires single-crystal silicon s
ubstrates of unprecedented uniformity and purity, As the device feature len
gths shrink into the realm of the nanoscale, it is becoming unlikely that t
he traditional technique of empirical process design and optimization in bo
th crystal growth and wafer processing will suffice for meeting the dynamic
ally evolving specifications. These circumstances are creating more demand
for a derailed understanding of the physical mechanisms that dictate the ev
olution of crystalline silicon microstructure and associated electronic pro
perties. This article describes modeling efforts based on the dynamics of n
ative point defects in silicon during crystal growth, which are aimed at de
veloping comprehensive and robust tools for predicting microdefect distribu
tion as a function of operating conditions. These tools are not developed i
ndependently of experimental characterization but rather are designed to ta
ke advantage of the very detailed information database available for silico
n generated by decades of industrial attention. The bulk of the article is
focused on two specific microdefect structures observed in Czochralski crys
talline silicon, the oxidation-induced stacking fault ring (OSF-ring) and o
ctahedral voids; the latter is a current limitation on the quality of comme
rcial CZ silicon crystals and the subject of intense research. (C) 2000 Pub
lished by Elsevier Science S.A.