Ultrathin gate dielectrics for silicon nanodevices

This paper reviews recent progress in structural and electronic characteriz ations of ultrathin SiO2 thermally grown on Si(100) surfaces and applicatio ns of such nanometer-thick gate oxides to advanced MOSFETs and quantum-dot MOS memory devices. Based on an accurate energy band profile determined for the n(+)-poly-Si/SiO2/Si(100) system, the measured tunnel current through ultrathin gate oxides has been quantitatively explained by theory. From the detailed analysis of MOSFET characteristics, the scaling limit of gate oxi de thickness is found to be 0.8 nm. Novel MOSFETs with a silicon quantum-do t floating gate embedded in the gate oxide have indicated the multiple-step electron injection to the dot, being interpreted in terms of Coulombic int eraction among charged dots. (C) 2000 Academic Press.