Efficient handling of operating range and manufacturing line variations inanalog cell synthesis

Citation
T. Mukherjee et al., Efficient handling of operating range and manufacturing line variations inanalog cell synthesis, IEEE COMP A, 19(8), 2000, pp. 825-839
Citations number
39
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS
ISSN journal
02780070 → ACNP
Volume
19
Issue
8
Year of publication
2000
Pages
825 - 839
Database
ISI
SICI code
0278-0070(200008)19:8<825:EHOORA>2.0.ZU;2-K
Abstract
We describe a synthesis system that takes operating range constraints and i nter and intracircuit parametric manufacturing variations into account whil e designing a sized and biased analog circuit. Previous approaches to compu ter-aided design fur analog circuit synthesis have concentrated on nominal analog circuit design, and subsequent optimization of these circuits for st atistical fluctuations and operating point ranges. Our approach simultaneou sly synthesizes and optimizes for operating and manufacturing variations by mapping the circuit design problem into an Infinite Programming problem an d solving it using an annealing within annealing formulation. We present ci rcuits designed by this integrated synthesis system, and show that they ind eed meet their operating range and parametric manufacturing constraints. An d finally, we show that our consideration of variations during the initial optimization-based circuit synthesis leads to better starting points for po st-synthesis yield optimization than a classical nominal synthesis approach .