Si/Si1-xGex heterostructure field effect transistors fabricated using a low thermal budget CMOS process

Strained Si/Si0.75Ge0.25 heterostructure field effect transistors (HFETs) h ave been fabricated using a modified, low-thermal budget CMOS process with deposited gate oxides. Transmission electron microscopy demonstrates the in tegrity of the strained-Si quantum well after processing. The transconducta nces of the HFET devices are higher than the similarly processed Si MOSFET devices. Electrical characterisation data is presented which suggest that t hinner gate oxides, higher Ge contents in the virtual substrate and optimis ation of the p-type substrate doping profile will improve device performanc e.