Thermal distortion predictions of a silicon wafer during exposure in a scalpel tool

Citation
S. Gianoulakis et al., Thermal distortion predictions of a silicon wafer during exposure in a scalpel tool, MICROEL ENG, 53(1-4), 2000, pp. 357-360
Citations number
3
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONIC ENGINEERING
ISSN journal
01679317 → ACNP
Volume
53
Issue
1-4
Year of publication
2000
Pages
357 - 360
Database
ISI
SICI code
0167-9317(200006)53:1-4<357:TDPOAS>2.0.ZU;2-4
Abstract
Lucent Technologies Bell Laboratories is developing a projection electron l ithography system known as SCALPEL for post-optical lithography. SCALPEL em ploys a full die area patterned mask and a 0.25 mm imaging sub-field which is electronically scanned to provide a 3 mm long "effective field" area. Th is elemental image area is stitched to neighboring areas as mask and wafer stages make complementary motions. SCALPEL utilizes a typical 25 mA current of 100keV electrons. One issue of concern is the thermal distortion of the silicon wafer during exposure, due to power absorbed from the electron bea m. This transient thermal expansion needs to be quantified to support the d evelopment of optimized writing strategies and associated correction. This paper presents a multi-level distortion characterization of a silicon wafer during exposure in a SCALPEL tool.