A novel insulation technique for smart power switching devices and very high voltage ICs above 10 kV

In this paper we will present anew CMOS compatible integration technique wh ich will allow an integration of smart power switching devices and HV ICs w ith operating voltages above 10kV. With an improved etching technique on st andard silicon wafers all devices (low voltage and high voltage) can be int egrated in the same silicon substrate at the same time. Since yet other res earchers have integrated KV ICs in SOI films or in high resistive material with maximum blocking voltages of 1400V so far [1]. High voltage switching devices are only available with switching currents above several amperes on a large device area. Measurements of our monolithicaly integrated low curr ent HV devices with blocking voltages of more than 10kV on a small chip are a of about 45mm(2) will be presented.