Dry etch improvements in the SOI Wafer Flow Process for IPL stencil mask fabrication

Citation
F. Letzkus et al., Dry etch improvements in the SOI Wafer Flow Process for IPL stencil mask fabrication, MICROEL ENG, 53(1-4), 2000, pp. 609-612
Citations number
4
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
MICROELECTRONIC ENGINEERING
ISSN journal
01679317 → ACNP
Volume
53
Issue
1-4
Year of publication
2000
Pages
609 - 612
Database
ISI
SICI code
0167-9317(200006)53:1-4<609:DEIITS>2.0.ZU;2-X
Abstract
The 4x Ion Projection Lithography (IPL), which is designed to reach sub 100 nm resolution on the wafer plane, uses stencil membrane masks out of 150mm SOI (Silicon On Insulator) wafers [1]. The structured circular membranes ha ve a diameter of 126mm and a thickness of 3 mu m. Results of a new sub-quar ter micron trench etch and membrane dry etch process are presented and disc ussed.