Multilayer integrated-circuit imaging with contrast enhancement in a large-area, high-resolution electron-beam system

Electron-beam techniques and sample-preparation methods have been establish ed to meet the requirements for imaging of complete integrated circuits to determine the layout of each layer in the circuit and the layer-to-layer in terconnections. Selective plating has been used to enhance contrast in back scattered-electron images of metal layers and for via identification. Combi ning a large-area imaging system with de-processing techniques and zinc ele ctroless plating has given images with good discrimination between successi ve layers in an integrated circuit, to permit the full reconstruction of th e electrical connections of multi-layer integrated circuits including via c ontacts.