Synthesis of interfaces and communication in reconfigurable embedded systems

Reconfigurable devices are used in different ways for the design of embedde d systems. As reconfigurable computing is a rather new field, there is stil l a lack of design methodologies and tools. Previous work on design automat ion for reconfigurable systems focused on partitioning and scheduling. The authors present an approach to communication synthesis in reconfigurable em bedded systems. Using the proposed methodology, the designer can focus on t he functional behavior of the design and on the evaluation of different map pings. All the low-level details of the reconfigurable resource are hidden. In the paper, the authors first classify communication types in reconfigur able systems, covering both compile-time and run-time reconfiguration. Then they describe their tool suite CORES/HASIS that generates interface circui try to connect communicating tasks in reconfigurable systems. The tasks may be mapped onto the same or onto different FPGAs. The tools multiplex sever al logical communication channels over one physical channel, insert routing nodes to connect tasks on nonadjacent devices, and provide dedicated inter faces that solve the problem of interconfiguration communication. A case st udy demonstrates the usability and efficiency of the approach.