Field programmable gate arrays (FPGAs) are flexible programmable devices th
at are used in a wide variety of applications. The flexibility of the FPGA
hinders its performance due to the additional logic resources required for
programmable hardware. The paper proposes a high speed SiGe heterojunction
bipolar transistor (HBT) FPGA design co-integrated with CMOS in an IBM BICM
OS process. This device would be bitwise compatible with the Xilinx 6200, w
ith operating frequencies in the 1-20 GHz range. To reduce power dissipatio
n, the configuration bits used to define the FPGA's function will be stored
in CMOS memory. Further power savings can be accomplished by integrating C
MOS control into bipolar current trees and using a switchable current mirro
r to turn off unused current trees. The speed of bipolar combined with powe
r savings of CMOS can now be merged to produce a new family of high speed F
PGAs.