Yield enhancement in semiconductor fabrication is important. Even though IC
yield loss may be attributed to many problems, the existence of defects on
the wafer is one of the main causes. When the defects on the wafer form sp
atial patterns, it is usually a clue for the identification of equipment pr
oblems or process variations. This research intends to develop an intellige
nt system, which will recognize defect spatial patterns to aid in the diagn
osis of failure causes. The neural-network architecture named adaptive reso
nance theory network 1 (ART1) was adopted for this purpose, Actual data obt
ained from a semiconductor manufacturing company in Taiwan were used in exp
eriments with the proposed system. Comparison between ART1 and another unsu
pervised neural network, self-organizing map (SOM), was also conducted. The
results show that ART1 architecture can recognize the similar defect spati
al patterns more easily and correctly.