Configurable 2-D linear feedback shift registers for VLSI built-in self-test designs

Recently a multiple-sequence test generator was presented based on two-dime nsional linear feedback shift registers (2-D LFSR). This generator can gene rate a set of precomputed test vectors obtained by an ATPG tool for detecti ng random-pattern-resistant faults and particular hard-to-detect faults. In addition, it can generate better random patterns than a conventional LFSR. In this paper we describe an optimized BIST scheme which has a configurabl e 2-D LFSR structure. Starting from a set of stuck-at faults and a correspo nding set of test vectors detecting these faults, the corresponding test pa ttern generator is determined automatically. A synthesis procedure of desig ning this test generator is presented. Experimental results show that the h ardware overhead is considerably reduced compared with 2-D LFSR generators,