Bit error probabilities in high temperature superconductor logic

We present error rate simulations for a single flux quantum logic circuit w hich include statistical variations in the circuit parameters. We find that the fabrication yield, junction critical margins, and bit error probabilit ies of the nominal circuit can give a false impression of the performance o f practical circuits. For our study circuit, the toggle flipflop, we find t hat, although the standard figures of merit may vary only marginally with d esign rules, the average error rate can differ by a factor of 10(4). Furthe rmore, for a state-of-the-art technology, the error rates of different real izations of the same design actually span 10 orders of magnitude. These res ults highlight the inadequacy of current figures of merit to gauge the perf ormance of high temperature superconductor designs. (C) 2000 American Insti tute of Physics. [S0003- 6951(00)04216-9].