The G5, the most recent member of the S390 server family, was announced in
May 1998. The multichip module (MCM) at the heart of the G5 system consists
of 29 CMOS chips on a 127.5 mm glass ceramic substrate with 6 levels of th
in films (TF) including 1 signal plane pair. System performance of the G5 e
xceeds 1000 MIPS, This breakthrough performance resulted from the synergy c
reated by combining IBM's leadership technologies in CMOS high frequency mi
croprocessor design with advanced packaging and flip chip interconnections.
From a substrate perspective, IBM moved from alumina ceramic with molybden
um (Mo) conductor to cordurite/glass ceramic, and copper (Cu) conductor, an
d from TF redistribution (4 levels) to TF wiring (6 levels). This paper dis
cusses the TF implications from a change of substrate material and increase
d wiring density, as well as the need to implement a polyimide cushion laye
r as part of a pin grid array (PGA) fabrication process that supports 4224
I/O's.