Design of a high speed processor system bus for notebook computers

A 133 MHz processor system bus (PSB) has been designed and developed for no tebook computer systems running at core frequency of 500 MHz and beyond bas ed on an enhanced gunning transceiver logic. We described the design flow a nd highlighted the design challenges unique to notebook computers, It is sh own that with careful I/O circuit design, transmission line analysis and re liability consideration, the design target can be achieved. The similar app roach can be applied to notebook computers with even higher bus frequency.