Citation
L. Kalampoukas et al., High-speed parallel-prefix module 2(n)-1 adders, IEEE COMPUT, 49(7), 2000, pp. 673-680
Citations number
24
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE TRANSACTIONS ON COMPUTERS
ISSN journal
00189340
→ ACNP
Volume
49
Issue
7
Year of publication
2000
Pages
673 - 680
Database
ISI
SICI code
0018-9340(200007)49:7<673:HPM2A>2.0.ZU;2-E
Abstract
A novel parallel-prefix architecture for high speed module 2(n) - 1 adders
is presented. The proposed architecture is based on the idea of recirculati
ng the generate and propagate signals, instead of the traditional end-aroun
d carry approach. Static CMOS implementations verify that the proposed arch
itecture compares favorably with the already known parallel-prefix or carry
look-ahead structures.