Interferometric temperature mapping during ESD stress and failure analysisof smart power technology ESD protection devices

Citation
C. Furbock et al., Interferometric temperature mapping during ESD stress and failure analysisof smart power technology ESD protection devices, J ELECTROST, 49(3-4), 2000, pp. 195-213
Citations number
30
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
JOURNAL OF ELECTROSTATICS
ISSN journal
03043886 → ACNP
Volume
49
Issue
3-4
Year of publication
2000
Pages
195 - 213
Database
ISI
SICI code
0304-3886(200008)49:3-4<195:ITMDES>2.0.ZU;2-J
Abstract
Breakdown homogeneity and triggering of bipolar transistor action are studi ed in Smart Power technology ESD protection devices via measurements of tem perature distribution and thermal dynamics by a laser interferometric techn ique. Temperature changes in the devices biased in the avalanche multiplica tion or snapback region are monitored by ns-time scale measurements of the optical phase shift. The distribution of the temperature-induced phase shif t is correlated with the position of ESD damage obtained by backside IR mic roscopy. (C) 2000 Elsevier Science B.V. All rights reserved.