ANALOG VLSI STOCHASTIC PERTURBATIVE LEARNING ARCHITECTURES

Authors
Citation
G. Cauwenberghs, ANALOG VLSI STOCHASTIC PERTURBATIVE LEARNING ARCHITECTURES, Analog integrated circuits and signal processing, 13(1-2), 1997, pp. 195-209
Citations number
41
Categorie Soggetti
Computer Sciences","Engineering, Eletrical & Electronic","Computer Science Hardware & Architecture
ISSN journal
09251030
Volume
13
Issue
1-2
Year of publication
1997
Pages
195 - 209
Database
ISI
SICI code
0925-1030(1997)13:1-2<195:AVSPLA>2.0.ZU;2-P
Abstract
We present analog VLSI neuromorphic architectures for a general class of learning tasks, which include supervised learning, reinforcement le arning, and temporal difference learning. The presented architectures are parallel, cellular, sparse in global interconnects, distributed in representation, and robust to noise and mismatches in the implementat ion. They use a parallel stochastic perturbation technique to estimate the effect of weight changes on network outputs, rather than calculat ing derivatives based on a model of the network. This ''model-free'' t echnique avoids errors due to mismatches in the physical implementatio n of the network, and more generally allows to train networks of which the exact characteristics and structure are not known. With additiona l mechanisms of reinforcement learning, networks of fairly general str ucture are trained effectively from an arbitrarily supplied reward sig nal. No prior assumptions are required on the structure of the network nor on the specifics of the desired network response.