WINNER-TAKES-ALL ASSOCIATIVE MEMORY - A HAMMING DISTANCE VECTOR QUANTIZER

We present a design methodology for mapping neuraly inspired algorithm s for vector quantization, into VLSI hardware. We describe the buildin g blocks used: memory cells, current conveyors, and translinear circui ts. We use the basic building blocks to design an associative processo r for bit-pattern classification; a high-density memory based neuromor phic processor. Operating in parallel, the single chip system determin es the closest match, based on the Hamming distance, between an input bit pattern and multiple stored bit templates; ties are broken arbitra rily. Energy efficient processing is achieved through a precision-on-d emand architecture. Scalable storage and processing is achieved throug h a compact six transistor static RAM cell/ALU circuit. The single chi p system is programmable for template sets of up to 124 bits per templ ate and can store up to 116 templates (total storage capacity of 14 Kb its). An additional 604 bits of auxiliary storage is used for pipelini ng and fault tolerance reconfiguration capability. A fully functional 6.8mm by 6.9mm chip has been fabricated in a standard single-poly, dou ble-metal 2.0 mu m n-well CMOS process.