Equivalent circuit for multiple vias in parallel plate environment

Citation
R. Abhari et al., Equivalent circuit for multiple vias in parallel plate environment, ELECTR LETT, 36(17), 2000, pp. 1446-1447
Citations number
7
Categorie Soggetti
Eletrical & Eletronics Engineeing
Journal title
ELECTRONICS LETTERS
ISSN journal
00135194 → ACNP
Volume
36
Issue
17
Year of publication
2000
Pages
1446 - 1447
Database
ISI
SICI code
0013-5194(20000817)36:17<1446:ECFMVI>2.0.ZU;2-D
Abstract
An equivalent one-dimensional circuit has been developed to model the loadi ng effects of vias (through or buried) in a parallel plate environment. Owi ng to the one-dimensional nature of the model, the simulation time is drama tically reduced, compared to either two-dimensional inductance-capacitance ladder network or full-wave numerical electromagnetic simulations. This mod el can be easily included in available commercial circuit simulators and ac counts for multiple via interactions as well as for substrate edge reflecti ons.