Design methodology for a large communication chip

Citation
R. Clauberg et al., Design methodology for a large communication chip, IEEE DES T, 17(3), 2000, pp. 86-94
Citations number
9
Categorie Soggetti
Computer Science & Engineering
Journal title
IEEE DESIGN & TEST OF COMPUTERS
ISSN journal
07407475 → ACNP
Volume
17
Issue
3
Year of publication
2000
Pages
86 - 94
Database
ISI
SICI code
0740-7475(200007/09)17:3<86:DMFALC>2.0.ZU;2-A
Abstract
The example chip operates with 14 externally provided system clocks plus fo ur clocks recovered from input data streams and 36 corresponding internal c lock domains. It also couples a large digital design to a mixed-signal part in physical design.