An accurate and efficient method for modelling CMOS gates by a single equiv
alent transistor is introduced in this paper. The output waveform of a CMOS
inverter is obtained by solving the circuit differential equation consider
ing only the conducting transistor of the inverter. The effect of the short
-circuiting transistor is incorporated as a differentiation of the width of
the conducting transistor. The proposed model is the simplest primitive th
at can be used in order to obtain the propagation delay and short-circuit p
ower dissipation of CMOS gates. Consequently, it can offer significant spee
d improvement to existing dynamic timing and power simulators while maintai
ning a sufficient level of accuracy.