Submicron super TFTs for 3-D VLSI applications

High performance submicron super TFTs are reported. A novel grain enhanceme nt method is used to form large single grain silicon at the channel region of the TFT, making its structure comparable to SOI MOSFET. The process can be performed with high controllability, thus giving much smaller device-to- device variation compared to conventional TFT process, The reported n-chann el super TFT displays a subthreshold swing of 72 mV/dec, g(max) = 198 mS/mm and an I-dast Of 0 3 mA/mu m at V-g - V-t = 1.5 V,with L-G = 0.4 mu m and t(ox) = 110 Angstrom. The super TFT technology will facilitate the formatio n of three-dimensional (3-D) VLSI circuits and double gate CMOS.