Study on the hot-carrier-degradation mechanism and hot-carrier-effect immunity in advanced grooved-gate PMOSFET

In this paper,the hot-carrier mechanism in grooved-gate MOS is analyzed at first. It is found that the hot-carrier effect reaches its highest generate rate under medium gate bias voltage of the three stress areas. Then,the ch aracteristics of hot-carrier-effect in grooved-gate and planar PMOSFET are simulated using advanced 2-dimensional device simulator. The results show t hat the hot-carrier generated in grooved-gate PMOSFET is far less than in p lanar PMOSFET, especially for the case of channel length in deep-sub-micron and super deep-sub-micron region. In order to investigate the other influe nces of hot-carrier-effect immunity on device characteristics,the drift of gate and drain characteristics induced by different interface state is stud ied for grooved-gate and planar devices. It shows that the drift induced by same interface state in grooved-gate MOSFET is far larger than in planar d evice. This work lays a foundation for the research and design of novel ver y-small-size grooved gate CMOS devices.