Dtk. Tong et al., Optoelectronic phase-locked loop with balanced photodetection for clock recovery in high-speed optical time-division-multiplexed systems, IEEE PHOTON, 12(8), 2000, pp. 1064-1066
An optoelectronic phase-locked loop (PLL) for clock recovery in high-speed
optical time-division-multiplexed (OTDM) systems is proposed and experiment
ally demonstrated. The proposed scheme incorporates a pair of balanced phot
odetector through which the polarity ambiguity in error signal is resolved,
and the cancellation of laser noise enables clock recovery with low timing
jitter. Using an electroabsorption modulator as a phase detector, a 10-GHz
clock signal with root-mean-square (rms) timing jitter of 300 fs is succes
sfully extracted from 40 and 80 Gb/s return-to-zero (RZ) data stream. A 40-
to 10-Gb/s demultiplexing is performed by using the recovered clock signal
with no penalty introduced in the bit error rate performance.