Stride prefetching for the secondary data cache

A prefetch method that enables stride prefetching at the secondary cache wi thout accessing the processor's internal resources is developed and evaluat ed. It uses a data-range-table that enables it to detect usable strides and memory access streams which fall into the same data range. By using progra m driven simulation of scientific applications in the context of shared-mem ory multiprocessors, it is shown that the proposed method can reduce load s tall times by an amount comparable to a conventional stride driven prefetch ing method which requires access to the processor's instruction address reg ister. (C) 2000 Elsevier Science B.V. All rights reserved.