This paper reports the results of extensive bias temperature annealing inve
stigations made with metal-insulator semiconductor (MIS) capacitors of copp
er and fluorinated plasma-enhanced chemical vapor deposition (PECVD) oxide.
Reduction of resistance-capacitance delay is necessary to improve intercon
nect performance. While copper has been accepted as the new interconnect me
tal, several low dielectric constant materials are being considered as pote
ntial replacements for silicon oxide. Fluorinated silicon oxides deposited
by the PECVD process have a moderately low dielectric constant (K = 3.0-3.7
). The film structure and electrical behavior of fluorinated films was foun
d to depend on the flow rate of the fluorine precursor C2F6 In several case
s, both fluorinated and nonfluorinated oxides exhibit significant leakage c
urrents. The reason for such poor electrical behavior has been related to t
he presence of pinholelike defects (which were identified by KOH etch testi
ng) in these oxides. The existence of such pinholes is believed to be assoc
iated with nucleation and growth processes during the deposition and the th
ickness of the deposited dielectric (100 nm) used in this investigation. (C
) 2000 The Electrochemical Society. S0013-4651(99)10-057-0. All rights rese
rved.