Parallel adder design with reduced circuit complexity using resonant tunneling transistors and threshold logic

Quantum-effect devices utilizing resonant tunneling are promising candidate s for future nano-scale integration. Originating from the technological pro gress of semiconductor technology, circuit architectures with reduced compl exity are investigated by exploiting the negative-differential resistance o f resonant tunneling devices. In this paper a resonant tunneling device thr eshold logic family based on the Monostable-Bistable Transition Logic Eleme nt (MOBILE) is proposed and applied to different parallel adder designs, su ch as ripple carry and binary carry lookahead adders. The basic device is a resonant tunneling transistor (RTT) composed of a resonant tunneling diode monolithically integrated on the drain contact layer of a heterostructure field effect transistor. On the circuit level the key components are a prog rammable NAND/NOR logic gate, threshold logic gates, and parallel counters. The special properties of MOBILE logic Sates are considered by a bit-level pipelined circuit style. Experimental results are presented for the NAND/N OR logic gate.