On light-related electrical properties of porous silicon/crystalline silicon structure

The paper presents the results of improved feedback charge capacitance-volt age (C-V) measurements obtained on a porous silicon (PS)/p-type crystalline silicon (c-Si) structure prepared in the MOS configuration. Even though th e porosity (less than 10%) of the similar to 1-mu m-thick PS overlayer is l ow, some electrical properties of the structure are considerably sensitive to the light exposure. Such parameters as Fermi level position, flat-band v oltage, surface potential, positions of the deep-level hole traps and accep tor density will be presented for various situations as defined by the samp le ambient, the temperature and light illumination. The following two findi ngs are shown and analyzed: (i) total suppression of the large hysteresis, which is typical for the mea surements in dark, of the C-V curves after the illumination, and which is r elated to the Staebler-Wronski effect (SWE); (ii) interface states are recovered in the dark and its density N-ss has in creased by similar to 4.7 x 10(10) cm(-2) eV(-1) in comparison with the zer o density of illuminated PS/c-Si structure. (C) 2000 Elsevier Science B.V. All rights reserved.