Development of virtual reliability methodology for area-array devices usedin implantable and automotive applications

Citation
Sk. Sitaraman et al., Development of virtual reliability methodology for area-array devices usedin implantable and automotive applications, IEEE T COMP, 23(3), 2000, pp. 452-461
Citations number
14
Categorie Soggetti
Material Science & Engineering
Journal title
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES
ISSN journal
15213331 → ACNP
Volume
23
Issue
3
Year of publication
2000
Pages
452 - 461
Database
ISI
SICI code
1521-3331(200009)23:3<452:DOVRMF>2.0.ZU;2-T
Abstract
The number of thermal cycles, the temperature range, and the time of dwell used for qualifying a microelectronic package should be based on the type o f application the package is intended for. However, in the absence of speci fic guidelines, the industrial practice is to subject the devices to milita ry-standard qualification: tests without adequate consideration for the app lication the devices are intended for. This work aims at developing tempera ture cycling guidelines for packages used in implantable medical devices an d automotive applications taking into consideration the thermal history ass ociated with the field conditions. Numerical models have been developed tha t take the time- and temperature-dependent behavior of the solder joints an d the viscoelastic behavior of the underfill besides the temperature-depend ent orthotropic properties of the substrate for a flip-chip on, board(FCOB) assembly and a flip chip chip-scale package (FCCSP) on organic board assem bly. The models account for solder reflow process, underfill cure process, and burn-in testing of the devices, Qualification temperature cycling guide lines have been developed for implantable devices based on the information collected in terms of shipping, EM sterilization, and implantation temperat ure profiles, and for the automotive devices based on the representative fi eld conditions.