Memory hierarchy considerations for cost-effective cluster computing

Using off-the-shelf commodity workstations and PCs to build a cluster for p arallel computing has become a common practice. The cost-effectiveness of a cluster computing platform for a given budget and for certain types of app lications is mainly determined by its memory hierarchy and the interconnect ion network configurations of the cluster. Finding such a cost-effective so lution from exhaustive simulations would be highly time-consuming and predi ctions from measurements on existing clusters would be impractical. We pres ent an analytical model for evaluating the performance impact of memory hie rarchies and networks on cluster computing. The model covers the memory hie rarchy of a single SMP, a duster of workstations/PCs, or a cluster of SMPs by changing various architectural parameters. Network variations covering b oth bus and switch networks are also included in the analysis. Different ty pes of applications are characterized by parameterized workloads with diffe rent computation and communication requirements. The model has been validat ed by simulations and measurements. The workloads used for experiments are both scientific applications and commercial workloads. Our study shows that the depth of the memory hierarchy is the most sensitive factor affecting t he execution time for many types of workloads. However, the interconnection network cost of a tightly coupled system with a short depth in memory hier archy, such as an SMP, is significantly more expensive than a normal cluste r network connecting independent computer nodes. Thus, the essential issue to be considered is the trade-off between the depth of the memory hierarchy and the system cost. Based on analyses and case studies, we present our qu antitative recommendations for building cost-effective clusters for differe nt workloads.